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A 'digital signal processor' ('DSP') is a specialized microprocessor designed specifically for digital signal processing, generally in real-time computing.

Contents

Characteristics of typical Digital Signal Processors

Architectural features of digital signal processors

Program flow

Memory architecture

Data operations

Instruction sets

History

DSPs in 2007

See also

External links

Characteristics of typical Digital Signal Processors

★ Designed for real-time processing

★ Optimum performance with streaming data

★ Separate program and data memories (Harvard architecture)

★ Special Instructions for SIMD (Single Instruction, Multiple Data) operations

★ No hardware support for multitasking

★ The ability to act as a direct memory access device if in a host environment

★ Processes digital signals converted (using an Analog-to-digital converter (ADC)) from analog signals. Output is then converted back to analog form using a Digital-to-analog converter (DAC)

Architectural features of digital signal processors

Digital signal processing can be done on general-purpose microprocessors. However, a digital signal processor contains architectural optimizations to speed up processing. These optimizations are also important to lower costs, heat-emission and power-consumption.

Program flow

★ Floating-point unit integrated directly into the data-path.

★ Pipelined architecture

★ Highly parallel accumulator and multiplier

★ Special looping hardware. Low-overhead or Zero-overhead looping capability

Memory architecture

★ DSPs often use special memory architectures that are able to fetch multiple data and/or instructions at the same time:

★
★ Harvard architecture

★
★ modified von Neumann architecture

★ Use of direct memory access

★ Memory-address calculation unit

Data operations

★ Saturation arithmetic, in which operations that produce overflows will accumulate at the maximum (or minimum) values that the register can hold rather than wrapping around (maximum+1 doesn't overflow to minimum as in many general-purpose CPUs, instead it stays at maximum). Sometimes various sticky bits operation modes are available.

★ Fixed-point arithmetic is often used to speed up arithmetic processing.

★ Single-cycle operations to increase the benefits of pipelining.

Instruction sets

★ Multiply-accumulate (MAC, aka fused multiply-add, FMA) operations, which are used extensively in all kinds of matrix operations, such as convolution for filtering, dot product, or even polynomial evaluation (see Horner scheme).

★ Instructions to increase parallelism: SIMD, VLIW, superscalar architecture.

★ Specialized instructions for modulo addressing in ring buffers and bit-reversed addressing mode for FFT cross-referencing.

★ Digital signal processors sometimes use time-stationary encoding to simplify hardware and increase coding efficiency

History

In 1978, Intel released the 2920 as an "analog signal processor". It had an on-chip ADC/DAC with an internal signal processor, but it didn't have a hardware multiplier and was not successful in the market. In 1979, AMI released the S2811. It was designed as a microprocessor peripheral, and it had to be initialized by the host. The S2811 was likewise not successful in the market.
In 1979, Bell Labs introduced the first single chip DSP, the Mac 4 Microprocessor. Then, in 1980 the first stand-alone, complete DSPs -- the NEC µPD7720 and AT&T DSP1 -- were presented at the IEEE International Solid-State Circuits Conference '80. Both processors were inspired by the research in PSTN telecommunications.
The Altamira DX-1 was another early DSP, utilizing quad integer pipelines with delayed branches and branch prediction.
The first DSP produced by Texas Instruments (TI), the TMS32010 presented in 1983, proved to be an even bigger success. It was based on the Harvard architecture, and so had separate instruction and data memory. It already had a special instruction set, with instructions like load-and-accumulate or multiply-and-accumulate. It could work on 16-bit numbers and needed 390ns for a multiply-add operation. TI is now the market leader in general purpose DSPs. Another successful design was the Motorola 56000.
About five years later, the second generation of DSPs began to spread. They had 3 memories for storing two operands simultaneously and included hardware to accelerate tight loops, they also had an addressing unit capable of loop-addressing. Some of them operated on 24-bit variables and a typical model only required about 21ns for a MAC (multiply-accumulate). Members of this generation were for example the AT&T DSP16A or the Motorola DSP56001.
The main improvement in the third generation was the appearance of application-specific units and instructions in the data path, or sometimes as coprocessors. These units allowed direct hardware acceleration of very specific but complex mathematical problems, like the Fourier-transform or matrix operations. Some chips, like the Motorola MC68356, even included more than one processor core to work in parallel. Other DSPs from 1995 are the TI TMS320C541 or the TMS 320C80.
The fourth generation is best characterized by the changes in the instruction set and the instruction encoding/decoding. SIMD and MMX extensions were added, VLIW and the superscalar architecture appeared. As always, the clock-speeds have increased, a 3ns MAC now became possible.

DSPs in 2007

Today’s signal processors yield much greater performance. This is due in part to both technological and architectural advancements like lower design rules, fast-access two-level cache, (E)DMA circuit and a wider bus system. Of course, not all DSPs provide the same speed and many kinds of signal processors exist, each one of them being better suited for a specific task, ranging in price from about US$1.50 to US$300. A Texas Instruments C6000 series DSP clocks at 1 GHz and implements separate instruction and data caches as well as a 8 MiB 2nd level cache, and its I/O speed is rapid thanks to its 64 EDMA channels. The top models are capable of even 8000 MIPS (million instructions per second), use VLIW encoding, perform eight operations per clock-cycle and are compatible with a broad range of external peripherals and various buses (PCI/serial/etc).
Another big signal processor manufacturer today is Analog Devices. The company provides a broad range of DSPs, but its main portfolio is multimedia processors, such as codecs, filters and digital-analog converters. Its SHARC-based processors range in performance from 66 MHz/198 MFLOPS (million floating-point operations per second) to 400 MHz/2400MFLOPS. Some models even support multiple multipliers and ALUs, SIMD instructions and audio processing-specific components and peripherals. Another product of the company is the Blackfin family of embedded digital signal processors, with models like the ADSP-BF531 to ADSP-BF536. These processors combine the features of a DSP with those of a general use processor. As a result, these processors can run simple operating systems like μCLinux, velOSity and Nucleus RTOS while operating relatively efficiently on real-time data.
Most DSPs use fixed-point arithmetic, because in real world signal processing, the additional range provided by floating point is not needed, and there is a large speed benefit and cost benefit due to reduced hardware complexity. Floating point DSPs may be invaluable in applications where a wide dynamic range is required. Product developers might also use floating point DSPs to reduce the cost and complexity of software development in exchange for more expensive hardware, since it is generally easier to implement algorithms in floating point.
General purpose CPUs have borrowed concepts from digital signal processors, exemplified by many new instructions present in the MMX and SSE extensions to the Intel IA-32 architecture instruction set (ISA).
Generally, DSPs are dedicated integrated circuits, however DSP functionality can also be realized using Field Programmable Gate Array chips.
Embedded general-purpose RISC processors are becoming increasingly DSP in functionality. For example, ARM Cortex-A8 has a 128-bit wide SIMD unit that can have impressive 16- and 8-bit performance for industry standard benchmarks.

See also

★ Microcontroller

★ Field-programmable gate array

★ Cell Processor

★ Ageia Physics Processing Unit

External links

★ DSP Processor - Core-Based Wireless System Design

★ Microcontroller.com

★ DSP Education and Research - List of Universities having DSP and other Embedded Systems Research Groups

★ DSP Engineering Magazine

★ Introduction to DSP - Processor tutorial

★ Improv Systems Homepage

★ Analog Devices Homepage

★ DSP Discussion Groups

★ DSP Online Book

★ DSPs and VLIW

★ Pocket Guide to Processors for DSP - Berkeley Design Technology, INC

★ DSP Online eBooks

★ Texas Instruments Homepage

★ CEVA, Inc. Homepage

★ Semiconductor Homepage

★ DSP-FPGA.com Magazine